2017-09-07 11:26:49 UTC
Question #1: It does not cache that range, am I right?
#2: Say you have a zipchip @8MHz running this loop:
LDA $C040 STROBE
That's 4+3=7 cycles I think, the zipchip is running at 8Mhz but on the scope I see one 500ns strobe pulse every two 1MHz cycles (500 kHz). I was expecting one pulse every cycle (1 MHz) given that it can run that code in less than a 1000ns cycle. I gues it goes like this:
run code until you hit a r/w that must go to main memory
wait until the next 1MHz cycle begins
do the sync r/w
So that although it executes the JMP and the LDA in a single cycle, the next cycle is the real load and it is not executing any more code until done with that, then the loop repeats.
All the accelerators do it like that or is there a better one?