2017-08-23 03:48:01 UTC
1) What is meant by odd and even access? Is there some counter from the moment the computer is reset where the first read at an address is considered odd and the second one is even and so on? If so, I guess we'd have to figure out the current value first in order to set it to where we want it. If not, what resets this counter?
2) Double reads - does that mean two consecutive reads, as in I can't even place a NOP in between those reads? I imagine three reads would terminate the effect and four reads would enable the effect again?
3) What constitutes High RAM being enabled? Is it when either HIRAMRD or HIRAMWRT is enabled, or if both are enabled? I ask because on page 130 Sathers states that ALTZP depends on High RAM being enabled to switch over $D000-$FFFF.
4) Is there a particular reason why we need to have HIRAMRD and HIRAMWRT? Why not just have a HIRAM switch that gives you full access when it's set just like any other region of RAM? Is this a feature or the result of some historical oddity?
5) On page 128 Sather's states : "4. When a system reset occurs, all MMU soft switches are reset (turned off). High RAM is disabled for reading and enabled for writing." I was scratching my head wondering why HIRAMWRT' would be enabled after a reset when I realized it's not... I keep forgetting the ['] after HIRAMWRT'. Anyway, my question is, does this mean that when I write to a ROM address it's actually writing to High RAM behind the scenes?